A 164 µW, 10-bit SAR ADC at 1-V for Biomedical Applications

Abstract

This work presents a low-power front-end Analog-to-Digital Converter (ADC) for biomedical applications. The mostly biomedical signals are low frequency range and have a limited dynamic range. A complete transistor level de sign of low-power 10-bit ADC at supply voltage of 1-V. The SAR ADC is preferred for biomedical applications due to it simple architecture and low power consumption. The ADC uses Nyquist architecture of Start-Of-The Art successive-approximation register (SAR) in 180nm CMOS technology at the sampling frequency of 2k/samples. The proposed design utilizes sample and-hold for input signal, while binary weighted capacitive digital-to-analog converter (DAC) as charge distribution for feedback DAC. A detailed study of binary weighted DAC and split array DAC also presented to consider the linearity of the higher resolution for SAR ADC. The SAR digital control logic is also carefully designed to meet the require ment of 10-bit resolution. The proper design of Dflip-flop is also important to avoid any issue in digital circuit. To improve performance of the SAR control logic, the transistor in the digital circuit with minimum double length are used.The critical paths with high threshold voltage transistor reduced. The control logic includes a ring counter and a code register. A shift register is a ring counter. While the End-of-Conversion (EOC) is also high at the starting clock cycle, all flip-flops are reset for the reminder of the EOC cycles. The comparator is also designed considering the low power constraints with few buffers at the output. The SAR ADC with sampling frequency of 2kS/s can achieve effectivenumber of bit (ENOB) of 9-bit by achieving THD of 56dB at the supply voltage of 1-V in 180nm CMOS Technology with power con sumption of 168 µW. The ADC is also simulated at the supply voltage of 0.5-V with power consumption of 73nW.